Additional new features include multiple phase-locked loops (PLLs), support for up to 198k bits of two-port embedded SRAM and 712 user-configurable I/Os, and improved in-system programmability.

"A huge market opportunity exists for Actel to directly address those FPGA and ASIC designers looking for the density range, flexibility, ASIC-like design methodology and non-volatility they require," said Barry Marsh, vice president, product marketing at Actel. "Additionally, the ProASIC Plus family's new features, paired with a design security advantage, positions Actel to aggressively penetrate these target markets."

New Features of ProASIC Plus

ProASIC Plus devices deliver high performance with system speeds of up to 100MHz and allow designers to seamlessly interface between 3.3- and 2.5-V devices in a mixed-voltage environment. The ProASIC Plus family contains two advanced clock-conditioning blocks, each consisting of a PLL core, delay lines and clock multiplier/dividers. Additionally, two high-speed LVPECL differential input pairs accommodate clock or data inputs. In-system programmability is supported through the IEEE standard 1149.1 JTAG interface.

Leverages Existing Design Methodology

The ProASIC Plus family is supported by Actel's Designer software, which includes place-and-route, timing analysis and memory generation functionality. Targeting both ASIC and FPGA environments, the devices are also supported by third-party design tools from Cadence, Exemplar, Model Technology, Synopsys and Synplicity. Because the ProASIC Plus devices work equally well with ASIC and FPGA design methodologies, designers can create high-density systems using existing tools and flows.

ProASIC Plus Advantages

Actel's ProASIC Plus devices offer levels of design security beyond SRAM-based FPGAs and conventional ASIC solutions, enabling an entirely new business model for intellectual property providers. ProASIC Plus FPGAs are user programmed with a multi-bit key that blocks external attempts to read or alter the configuration settings. Decapping and stripping of the ProASIC Plus device reveals only the structure of the flash cell, not the contents.

Actel also offers a low-risk, cost-effective conversion path from Actel's non-volatile, single-chip ProASIC Plus FPGAs to ASICs when volumes warrant it. The ASIC-like architecture and design methodology facilitate ASIC migration, minimizing time to market, system cost and the risks typically associated with conversions. The FPGA-to-ASIC program is well suited to high-volume applications in the industrial and communications markets.

Pricing and Availability

The first members of the ProASIC Plus family, the APA750 and APA1000, offer 750k and 1-million system gates, respectively, and are currently available as engineering samples with production scheduled to begin in Q2 2002. A portable programmer and complete demonstration platform are also available. Pricing for Actel's 750k and 1-million system gate ProASIC Plus devices begins at $199 and $399 in volume quantities, respectively. The rest of the family is expected to be available for sampling by Q2 2002 with expected pricing below $20 for the smallest devices in volume quantities. For further information about pricing and availability, please contact Actel.

About Actel

Actel Corporation is a supplier of innovative programmable logic solutions, including field-programmable gate arrays (FPGAs) based on antifuse and flash technologies, embedded-programmable gate arrays (EPGAs) based on SRAM technology, high-performance intellectual property (IP) cores, software development tools and design services. Founded in 1985 and headquartered in Sunnyvale, California, Actel employs approximately 500 people worldwide. The Company is traded on the Nasdaq National Market under the symbol ACTL and is located at 955 East Arques Avenue, Sunnyvale, California, 94086-4533. Telephone: 888-99-ACTEL (992-2835). Internet: http://www.actel.com.

NOTE: The Actel name and logo are trademarks or registered trademarks of Actel Corporation. All other trademarks and servicemarks are the property of their respective owners.